The STM32H562xx and STM32H563xx devices are high-performance microcontrollers of the STM32H5 series, based on the high-performance Arm® Cortex®-M33 32-bit RISC core. They operate at a frequency of up to 250 MHz.
The Cortex®-M33 core features a single-precision floating-point unit (FPU), which supports all the Arm® single-precision data-processing instructions and all the data types. This core implements a full set of DSP (digital signal processing) instructions and a memory protection unit (MPU) that enhances the application security.
The STM32H562xx and STM32H563xx devices are high-performance microcontrollers of the STM32H5 series, based on the high-performance Arm® Cortex®-M33 32-bit RISC core. They operate at a frequency of up to 250 MHz.
The Cortex®-M33 core features a single-precision floating-point unit (FPU), which supports all the Arm® single-precision data-processing instructions and all the data types. This core implements a full set of DSP (digital signal processing) instructions and a memory protection unit (MPU) that enhances the application security.
The devices embed high-speed memories (up to 2 Mbytes of dual bank flash memory and 640 Kbytes of SRAM), a flexible external memory controller (FMC) for devices with packages of 100 pins and more, one OCTOSPI memory interface (at least one Quad-SPI available on all packages), and an extensive range of enhanced I/Os and peripherals connected to three APB buses, three AHB buses, and a 32-bit multi-AHB bus matrix.
The devices offer a security foundation compliant with the trusted-based security architecture (TBSA) requirements from Arm®. They embed features to implement secure firmware updates. Beyond these capabilities, the devices incorporate secure firmware installation, allowing customers to secure code provisioning during production. A flexible life cycle is managed through multiple protection levels and secure debug authentication. Firmware hardware isolation is supported via securable peripherals, memories, and I/Os, along with privilege configuration for peripherals and memories.
The devices feature several protection mechanisms for embedded flash memory and SRAM: readout protection, write protection, secure, and hide protection areas.
Dedicated peripherals reinforce security: an HASH hardware accelerator and a true random number generator.
The devices offer active tamper detection and protection against transient and environmental perturbation attacks, thanks to several internal monitoring mechanisms that generate secret data erasure in case of an attack. This helps meet PCI requirements for point-of-sale applications.
The devices offer two fast 12-bit ADCs, two DAC channels, an internal voltage reference buffer, a low-power RTC, two 32-bit general-purpose timers, two 16-bit PWM timers dedicated to motor control, eight 16-bit general-purpose timers, two 16-bit basic timers, and six 16-bit low-power timers.
The devices also feature standard and advanced communication interfaces, namely: four I2Cs, one I3C, six SPIs, three I2Ss, six USARTs, six UARTs and one low-power UART, two SAIs, one digital camera interface (DCMI), up to two SDMMCs, up to two FDCANs, one USB full-speed, one USB Ty…[TRUNCATED]
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